File: ../../Sources/A7_prediction_error.vhd
0: ----------------------------------------------------------------------------------
1: -- Engineer: Vitor Mendes Camilo
2: --
3: -- Module Name: prediction_error - Behavioral
4: --
5: -- Description: Code segment A.7
6: -- Computation of prediction error
7: --
8: ----------------------------------------------------------------------------------
9:
10: library ieee;
11: use ieee.std_logic_1164.all;
12: use ieee.numeric_std.all;
13: use work.openjls_pkg.all;
14:
15: entity a7_prediction_error is
16: generic (
17: BITNESS : natural range 8 to 16 := CO_BITNESS_STD
18: );
19: port (
20: iIx : in unsigned (BITNESS - 1 downto 0);
21: iPx : in unsigned (BITNESS - 1 downto 0);
22: iSign : in std_logic;
23: oErrorVal : out signed (BITNESS downto 0)
24: );
25: end entity a7_prediction_error;
26:
27: architecture behavioral of a7_prediction_error is
28:
29: begin
30:
31: oErrorVal <= signed('0' & iIx) - signed('0' & iPx) when iSign = CO_SIGN_POS else
32: signed('0' & iPx) - signed('0' & iIx);
33:
34: end architecture behavioral;