File: ../../Sources/A9_modulo_reduction.vhd
0: ----------------------------------------------------------------------------------
1: -- Engineer: Vitor Mendes Camilo
2: --
3: -- Module Name: A9_modulo_reduction - Behavioral
4: --
5: -- Description: Code segment A.9
6: -- Modulo reduction of the error
7: --
8: ----------------------------------------------------------------------------------
9:
10: library ieee;
11: use ieee.std_logic_1164.all;
12: use ieee.numeric_std.all;
13: use work.openjls_pkg.all;
14:
15: entity a9_modulo_reduction is
16: generic (
17: BITNESS : natural range 8 to 16 := CO_BITNESS_STD;
18: RANGE_P : natural := CO_RANGE_STD
19: );
20: port (
21: iErrorVal : in signed (BITNESS downto 0);
22: oErrorVal : out signed (BITNESS downto 0)
23: );
24: end entity a9_modulo_reduction;
25:
26: architecture behavioral of a9_modulo_reduction is
27:
28: -- Intermediate widened by one bit so RANGE_P fits without sign-bit roll.
29: -- Required for any BITNESS: RANGE_P = 2**BITNESS, so signed(BITNESS+2) gives
30: -- max = 2**(BITNESS+1) - 1 >= RANGE_P.
31: constant RANGE_S : signed(BITNESS + 1 downto 0) := to_signed(RANGE_P, BITNESS + 2);
32:
33: signal sExt : signed(BITNESS + 1 downto 0);
34: signal sErrAdj : signed(BITNESS + 1 downto 0);
35:
36: begin
37:
38: sExt <= resize(iErrorVal, BITNESS + 2);
39:
40: sErrAdj <= sExt + RANGE_S when iErrorVal < 0 else
41: sExt;
42:
43: oErrorVal <= resize(sErrAdj - RANGE_S, BITNESS + 1) when sErrAdj >= (RANGE_P + 1) / 2 else
44: resize(sErrAdj, BITNESS + 1);
45:
46: end architecture behavioral;